• Part: EM9010
  • Description: Advanced Multimedia Analog Overlay Chip
  • Manufacturer: Sigma Designs
  • Size: 95.39 KB
Download EM9010 Datasheet PDF
Sigma Designs
EM9010
EM9010 is Advanced Multimedia Analog Overlay Chip manufactured by Sigma Designs.
Advanced Multimedia Analog Overlay Chip Description The EM9010 is an advanced multimedia analog overlay chip that provides overlaying live video over VGA graphics. It is the ideal panion chip for applications displaying (full-screen or in a window) high-quality video, such as Progressive DVD. Analog overlay technology eliminates the need for the traditional feature connector on the VGA video card. This eliminates patibility problems with different VGA feature connector standards and allows users to upgrade their graphics controller card without worrying about patibility issues. The EM9010 accepts both digital and analog inputs for MPEG video. Included on-chip are a YCb Cr to RGB color space converter, triple 8-bit video DACs, automatic polarity detection of the VGA HSYNC and VSYNC signals, and an integrated timing generator to generate PAL/NTSC timing signals. Features - Analog Overlay of Video and Graphics - Supports Resolutions up to 1600x1200 at Refresh Rates up to 120 Hz - Integrated Triple 8-bit Video DACs Support 16.8M Colors - Programmable RGB Color Key and Chroma Key Detection with six 8-bit DACs - Three Integrated Programmable Clocks: Video Clock PLL (Recovery up to 75 MHz), System Clock PLL, and General-Purpose Clock PLL - YCb Cr to RGB Color Space Converter Operating up to 75 MHz with 10-bit Precision Block Diagram VSYNC POLARITY DETECTION HSYNC BUFFERED VSYNC DELAYED VSYNC BUFFERED HSYNC DELAYED HSYNC EXTERNAL CLOCK PLL 14.318 MHZ XTAL VIDEO CLOCK SYSTEM CLOCK GENERAL CLOCK VRDY CHROMA DETECT ANALOG RGB .. YCBCR PCLK VD RGB YCBCR TRIPLE 8-BIT DAC S ANALOG RGB TO MONITOR MUX AUX ANALOG RGB TIMING GENERATOR Sigma Designs, Inc. 355 Fairview Way - Milpitas, CA, USA 95035 - Tel: 408.262.9003 - Fax: 408.957.9740 .sigmadesigns. - sales@sigmadesigns. Three internal programmable Phase Locked Loops (PLL) are provided. One generates a pixel clock locked to the horizontal sync input. The other two...