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82S10 Datasheet PDF

Signetics 82S10

the 82S10 and 82S11 require a single +5 volts power supply and feature very low current PNP input structures. They are fully TTL compatible, and include on-chip decoding and a chip enable input for ease of memory expansion. They feature either Open Collector or Tri-State outputs for optimization of word expansion in bussed organ izations.
Part No. 82S10
Datasheet 82S10 Download
Manufacturer
Signetics
Description 1024 x 1-BIT BIPOLAR RAM
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82S10 datasheet page 1 preview

DESCRIPTION

The 82S10/11 is a high speed 1024-bit random access memory organized as 1024 words X 1 bit. With a typical access time of 30ns, it is ideal for cache buffer applications and for systems requiring very high speed main memory. Both Both 82S 10 and 82S 11 devices are available in the commercial and military temperature ranges. For the commercial temperature range (OoC to +75°C) specify N82S10/11, I. For the military temperature range (-55°C to + 125°C) specify S82S 10/11, I.

FEATURES

● ORGANIZATION - 1024 X 1
● ADDRESS ACCESS TIME: S82S10/11 - 70n5, MAXIMUM N82S10/11 - 45ns, MAXIMUM
● WRITE CYCLE TIME: S82S10/11 - 75n5, MAXIMUM N82S10/11 - 45n5, MAXIMUM
● POWER DISSIPATION - 0.5mW/BIT, TYPICAL
● INPUT LOADING: S82S10/11 - (-150IlA) MAXIMUM N82S10/11 - (-100IlA) MAXIMUM
● ON-CHIP ADDRESS DECODING
● OUTPUT OPTIONS: 82S10 - OPEN COLLECTOR 82S11 - TRI-STATE
● NON-INVERTING OUTPUT
● BLANKED OUTPUT DURING WRITE
● 16 PIN CERAMIC PACKAGE

APPLICATIONS

HIGH SPEED MAIN FRAME CACHE MEMORY...
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