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Si!I-DntiGS 82S10 1024x1 BIT BIPOLAR RAM 82S11 _ _ _ _ _ _ _O_PE_NC_OL_LE_CT_OR_(B_2S1_0)_TR_I-S_TA_TE_(B_21---11)
FEBURARY 1975
DIGITAL 8000 SERIES TTL/MEMORY
DESCRIPTION
The 82S10/11 is a high speed 1024-bit random access memory organized as 1024 words X 1 bit. With a typical access time of 30ns, it is ideal for cache buffer applications and for systems requiring very high speed main memory. Both the 82S10 and 82S11 require a single +5 volts power supply and feature very low current PNP input structures. They are fully TTL compatible, and include on-chip decoding and a chip enable input for ease of memory expansion. They feature either Open Collector or Tri-State outputs for optimization of word expansion in bussed organ izations.