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82S16 Datasheet PDF

Signetics 82S16

The 82S16 and 82S17 are Schottky clamped TTL, read/ write memory arrays organized as 256 words of one bit each. They feature either open collector or tri-state output options for optimization of word expansion in bussed organizations. This feature allows faster execution of WRITE-READ cycles, enhancing the performance of systems utilizing indirect addressing modes, and/or requiring immediate verification following a WRITE cycle.
Part No. 82S16
Datasheet 82S16 Download
Manufacturer
Signetics
Description 256-BIT BIPOLAR RAM
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82S16 datasheet page 1 preview

DESCRIPTION

Memory expansion is further enhanced by full on-chip address decoding, 3 chip enable inputs and PNP input transistors which reduce input loading to 25pA for a "1" level, and -250pA (S82S16/17) or -100pA (N82S16/17) for a "0" level. During WRITE operation, the logical state of the output of both devices follows the complement of the data input being written. Both devices have fast read access and write cycle times, and thus are ideally suited in high-speed memory applications such as "Cache", buffers, scratch pads, writable control stores, etc. Both 82S16 and 82S17 devices are available in the commercial and military temperature ranges. For the commercial temperature range (DOC to + 75°C) specify N82S16/17, B or F. For the military temperature range (-55°C to +125°C) specify S82S16/17, F only.

FEATURES

● ORGANIZATION - 256 X 1
● ADDRESS ACCESS TIME: S82S16, S82S17 - 70n5, MAXIMUM N82S16, N82S17 -50ns, MAXIMUM
● WRITE CYCLE TIME: S82S16, S82S17 - 70n5, MAXIMUM N82S16, N82S17...
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