CY28400-2 Datasheet | Silicon Labs

100 MHz Differential Buffer for PCI Express and SATA Features - CK409 and CK410 panion buffer - Four differential 0.7V clock output pairs - OE_INV input for inverting OE, PWRDWN, and SRC_STP active levels - Individual OE controls - Low CTC jitter (< 50 ps) - Programmable bandwidth - SRC_STP power management control - SMBus Block/Byte/Word Read and Write support - 3.3V operation - PLL Bypass-configurable - Divide by 2 programmable outputs - 28-pin SSOP and TSSOP packages Functional Description The CY28400-2 is a differential buffer and serves as a panion device to the CK409 or CK410 clock generator. The device is capable of distributing the Serial Reference Clock (SRC) in PCI Express and SATA implementations. Block Diagram Pin Configuration OE_INV OE_1, OE_6 SRC_STP PWRDWN SCLK SDATA PLL/BYPASS# SRCT_IN SRCC_IN HIGH_BW# Output Control SMBus Controller DIFT1 DIFC1 DIFT2 DIFC2 Output Buffer DIFT5...