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SI5376 - 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

General Description

The Si5376 is a highly-integrated, 4-PLL, jitter-attenuating precision clock multiplier for applications requiring sub-1 ps jitter performance.

Key Features

  • Highly-integrated, 4 PLL clock.
  • Supports all ITU G.709 and any multiplier/jitter attenuator custom FEC ratios (239/237,.
  • Four independent DSPLLs support 255/238, 255/237, 255/236, 253/226) any-frequency synthesis and jitter.
  • Integrated loop filter with attenuation programmable bandwidth.
  • 8 inputs/8 outputs.
  • Simultaneous free-run and.
  • Each DSPLL can generate any synchronous operation frequency from 2 kHz to 808 MHz.
  • Automatic/manual hitless i.

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Datasheet Details

Part number SI5376
Manufacturer Silicon Laboratories
File Size 337.21 KB
Description 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Datasheet download datasheet SI5376 Datasheet

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Si5376 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR Features  Highly-integrated, 4 PLL clock  Supports all ITU G.709 and any multiplier/jitter attenuator custom FEC ratios (239/237,  Four independent DSPLLs support 255/238, 255/237, 255/236, 253/226) any-frequency synthesis and jitter  Integrated loop filter with attenuation programmable bandwidth  8 inputs/8 outputs  Simultaneous free-run and  Each DSPLL can generate any synchronous operation frequency from 2 kHz to 808 MHz  Automatic/manual hitless input clock from a 2 kHz to 710 MHz input switching  350 fs rms (12 kHz– 20 MHz) and  Selectable output clock signal format 410 fs rms (50 kHz–80 MHz) (LVPECL, LVDS, CML, CMOS) typical  LOL and interrupt alarm outputs  Meets ITU-T G.