SL23EP05
Overview
The SL23EP05 is a low skew, low jitter, and low power Zero Delay Buffer (ZDB) designed to produce up to five clock outputs from one reference input clock for high speed clock distribution applications. The product has an onchip PLL which locks to the input clock at CLKIN and receives its feedback internally from the CLKOUT pin.
- 10 to 220 MHz operating
- Low power dissipation: frequency range
- 16 mA-max at 66 MHz and
- Low output clock jitter: VDD = 3.3 V
- 50 ps-typ cycle-to-cycle jitter
- 20 ps-typ period jitter
- Low output-to-output skew: 30 ps-typ
- 14 mA-max at 66 MHz and VDD = 2.5 V
- One input drives five outputs organized as 4+1
- Low product-to-product skew: 60 ps-typ