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SST34HF1601C - (SST34HF16xxx) 16M-bit Concurrent SuperFlash + SRAM Combo Memory

Datasheet Summary

Description

The SST34HF16x1C/D/S ComboMemory devices integrate either a 1M x16 or 2M x8 CMOS flash memory bank with either a 128K x16/256K x8, 256K x16/512 x8, or 512K x16/1024K x8 CMOS SRAM or pseudo SRAM (PSRAM) memory bank in a multi-chip package (MCP).

Features

  • Flash Organization: 1M x16 or 2M x8.
  • Dual-Bank Architecture for Concurrent Read/Write Operation.
  • 16 Mbit: 12 Mbit + 4 Mbit.
  • (P)SRAM Organization:.
  • 2 Mbit: 128K x16 or 256K x8.
  • 4 Mbit: 256K x16 or 512K x8.
  • 8 Mbit: 512K x16 or 1024K x8.
  • Single 2.7-3.3V Read and Write Operations.
  • Superior Reliability.
  • Endurance: 100,000 Cycles (typical).
  • Greater than 100 years Data Retention.
  • Low Power Cons.

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Datasheet Details

Part number SST34HF1601C
Manufacturer Silicon Storage Technology
File Size 507.42 KB
Description (SST34HF16xxx) 16M-bit Concurrent SuperFlash + SRAM Combo Memory
Datasheet download datasheet SST34HF1601C Datasheet
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Other Datasheets by Silicon Storage Technology
  • SST34HF1601B - 16M-bit Concurrent SuperFlash Memory
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  • SST34HF1621A - (SST34HF1621A / SST34HF1641A / SST34HF1681) 16M-bit Concurrent SuperFlash + SRAM Combo Memory
  • SST34HF1621C - (SST34HF16xxx) 16M-bit Concurrent SuperFlash + SRAM Combo Memory
  • SST34HF1621S - (SST34HF16xxx) 16M-bit Concurrent SuperFlash + SRAM Combo Memory
  • SST34HF162x - (SST34HF162x / SST34HF164x) 16M-bit Concurrent SuperFlash + SRAM
  • SST34HF1641 - (SST34HF1621 / SST34HF1641) 16M-bit Concurrent SuperFlash + SRAM Combo Memory
  • SST34HF1641A - (SST34HF1621A / SST34HF1641A / SST34HF1681) 16M-bit Concurrent SuperFlash + SRAM Combo Memory

Full PDF Text Transcription

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16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory SST34HF1601C / SST34HF1621C / SST34HF1641C SST34HF1641D / SST34HF1681D / SST34HF1621S / SST34HF1641S SST34HF168116Mb CSF (x8/x16) + 2/4/8 Mb SRAM (x16) MCP ComboMemory Advance Information FEATURES: • Flash Organization: 1M x16 or 2M x8 • Dual-Bank Architecture for Concurrent Read/Write Operation – 16 Mbit: 12 Mbit + 4 Mbit • (P)SRAM Organization: – 2 Mbit: 128K x16 or 256K x8 – 4 Mbit: 256K x16 or 512K x8 – 8 Mbit: 512K x16 or 1024K x8 • Single 2.7-3.
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