SLD-1000 Datasheet | Sirenza Microdevices

Description Sirenza Microdevices’ SLD-1000 is a robust 4 Watt high performance LDMOS transistor die, designed for operation from 10 to 2700MHz. It is an excellent solution for applications requiring high linearity and efficiency. The SLD-1000 is typically used as a driver or output stage for power amplifier, or transmitter applications. These robust power transistors are fabricated using Sirenza’s high performance XEMOS IITM process. 4 Watt Discrete LDMOS FET -Bare Die Functional Schematic Diagram ESD Protection - - - - - - - Product Features 4 Watt Output P1d B Single Polarity Operation 19d B Gain at 900 MHz Xe MOS IITM LDMOS Integrated ESD Protection, Class 1B Aluminum Topside Metallization Gold Backside Metallization Gate Manifold Drain Manifold Source - Backside Contact RF Specifications Symbol Frequency Gain Efficiency Linearity RTH Parameter Frequency of Operation 3.5 Watts CW, 900 MHz Drain Efficiency at 3.5 Watts CW, 900 MHz - - - - - Applications Base Station PA Driver Repeaters Military munications RFID GSM, CDMA, Edge, WDCDMA Unit MHz d B % d Bc Watts ºC/W Min 10 Typ 19 43 -30 4 11 Max 2700 - 3rd Order IMD at 3.5 Watts PEP (Two Tone) 900 MHz 1d B pression (P1d B) 900 MHz Thermal Resistance (Junction-to-Case, mounted in package) Test Conditions: Mounted in ceramic package and tested in Sirenza T Evaluation Board VDS = 28.0V, IDQ = 30m A, TMounting Surface = 25ºC DC Specifications Symbol gm VGS Threshold VDS Breakdown Ciss Crss Coss RDSon Parameter Forward Transconductance @ 30m A IDS IDS=3m A 1m A IDS Current Input Capacitance (Gate to Source) VGS=0V, VDS=28V Reverse Capacitance (Gate to Drain) VGS=0V, VDS=28V Output Capacitance (Drain to Source) VGS=0V, VDS=28V Drain to Source Resistance, VGS=10V VDS=250m V Unit m A / V Volts Volts p F p F p F Ω 3.0 65 Min Typical 150 4.2 70 5.2 0.2 3.2 3.0 3.5 5.0 Max The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or...