DESCRIPTION
n FEATURES
Ÿ Number of LCD drive outputs: 120 Ÿ Supply voltage for LCD drive: Max +16V Ÿ Supply voltage for the logic system: +2.5 to +5.5 V Ÿ Low power consumption Ÿ Package: 136-pin COB. (Segment mode) Ÿ Shift clock frequency - 20 MHz (MAX.): VDD = +5.0 ± 0.5 V - 15 MHz (MAX.): VDD = +3.0 to + 4.5 V - 12 MHz (MAX.): VDD = +2.5 to + 3.0 V Ÿ Adopts a data bus system Ÿ 4-bit parallel / serial input modes are selectable with a mode (P/S) pin Ÿ Automatic transfer function of an enable signal Ÿ Automatic counting function which, in the chip selection mode, causes the internal clock to be stopped by automatically counting 120 bits of input data Ÿ Line latch circuits are reset when XDISPOFF active V1.3 1/ 20 2004/09/08 ST8011 n ST8011 Serial Specification Revision History ST8011 Serial Specification Revision History Version 0.0B 1.0 1.1 1.2 1.3 Date 2002/10/14 Preliminary version 2003/07/28 Final Version 2003/11/12 Modify the pin pitch 2004/04/05 Add application timing block diagram 2004/09/08 Define timing(tLSW ) of Segment Mode.
Sitronix Technology
