Si53208 Overview
Key Specifications
Description
The Si53212, Si53208, and Si53204 are the industry’s highest performance, low additive jitter, low power PCIe clock fanout buffer family that can source 4, 8, or 12 clock outputs. All differential clock outputs are compliant to PCIe Gen 1 through Gen 6 common clock and separate reference clock specifications.
Key Features
- 4, 8, and 12 Output 100 MHz PCIe Gen1 through Gen 6, compliant clock fanout buffer
- Low additive jitter: 0.02 ps rms max, Gen 6
- Low-power, push-pull, HCSL compatible differential outputs
- 10 MHz to 200 MHz clock input
- Individual hardware control pins and I2C controls for Output Enable