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CXL5001P - CMOS-CCD 1H Delay Line for NTSC

Datasheet Summary

Description

The CXL5001M/P are general-purpose CMOS-CCD delay line ICs that provide 1H delay time for NTSC.

Features

  • Low power consumtion 80mW (Typ. ).
  • Small size package (8-pin SOP, DIP).
  • Low differential gain DG = 3% (Typ. ).
  • Input signal ampiitude 180 IRE (= 1.28Vp-p, Max. ).
  • Low input clock amplitude operation 150mVp-p (Min. ).
  • Built-in peripheral circuits (clock driver, timing generator, autobias, and output circuits) Functions.
  • 680-bit CCD register.
  • Clock drivers.
  • Autobias circuit.
  • Sync tip clamp circuit.
  • Samp.

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Datasheet preview – CXL5001P

Datasheet Details

Part number CXL5001P
Manufacturer Sony Corporation
File Size 98.63 KB
Description CMOS-CCD 1H Delay Line for NTSC
Datasheet download datasheet CXL5001P Datasheet
Additional preview pages of the CXL5001P datasheet.

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Full PDF Text Transcription

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CXL5001M/P CMOS-CCD 1H Delay Line for NTSC Description The CXL5001M/P are general-purpose CMOS-CCD delay line ICs that provide 1H delay time for NTSC. Features • Low power consumtion 80mW (Typ.) • Small size package (8-pin SOP, DIP) • Low differential gain DG = 3% (Typ.) • Input signal ampiitude 180 IRE (= 1.28Vp-p, Max.) • Low input clock amplitude operation 150mVp-p (Min.
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