STN410D Datasheet PDF | Stanson Technology

Stanson Technology STN410D

STN410D is the N-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The STN410D has been designed specially to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.

Part No.	STN410D
Datasheet	STN410D Download
Manufacturer	Stanson Technology
Description	MOSFET
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DESCRIPTION

PIN CONFIGURATION (D-PAK) TO-252 TO-251 FEATURE 30V/ 15.0A, RDS(ON) = 40mΩ @VGS = 10V 30V/8.0A, RDS(ON) =50mΩ @VGS = 4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability TO-252,TO-251 package design PART MARKING Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp. STN410D 2009. V1 STN410D N Channel Enhancement Mode MOSFET 15.0A ABSOULTE

MAXIMUM RATINGS

(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current TA=25℃ TA=70℃ VGSS ID IDM Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical 30 ±12 15.0 10.0 30 12 25 12.5 150 -55/150 60 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp.