ST7407 Datasheet | Stanson

DESCRIPTION The ST7407 is the P-Channel logic enhancement mode power field effect transistors It is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone, notebook puter power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package. PIN CONFIGURATION SOT-323 (SC-70) 3 D GS 12 1.Gate 2.Source 3.Drain PART MARKING SOT-323 (SC-70) FEATURE z -20V/-3.4A, RDS(ON) = 100m-ohm @VGS = -4.5V z -20V/-2.4A, RDS(ON) = 125m-ohm @VGS = -2.5V z -20V/-1.8A, RDS(ON) = 170m-ohm @VGS = -1.8V z Super high density cell design for extremely low RDS(ON) z Exceptional on-resistance and maximum DC current capability z SOT-323 (SC-70) package design 07YA Y: Year Code A: Process Code ORDERING INFORMATION Part Number Package Part Marking ST7407S32RG SOT-323 07YA ※ Process Code : A ~ Z ; a ~ z ※ ST7407S32RG S32 : SOT-323 ; R : Tape Reel ; G : Pb - Free 120 Bentley Square, Mountain View, Ca 94040 USA .stansontech. ST7407 2006. V1 P Channel Enhancement Mode MOSFET -3.4A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage Gate-Source Voltage Continuous Drain Current TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current VDSS VGSS ID IDM -20 ±12 -2.3 -1.7 -6 Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction...