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SY10ELT23 - DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

Download the SY10ELT23 datasheet PDF. This datasheet also covers the SY100ELT23 variant, as both devices belong to the same dual differential pecl-to-ttl translator family and are provided as variant models within a single manufacturer datasheet.

General Description

The SY10/100ELT23 are dual differential PECL-to-TTL translators.

Because PECL (Positive ECL) levels are used, only +5V and ground are required.

Key Features

  • s s s s s s s 3.0ns typical propagation delay.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SY100ELT23_Synergy.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SY10ELT23
Manufacturer Synergy
File Size 116.76 KB
Description DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR
Datasheet download datasheet SY10ELT23 Datasheet

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Other Datasheets by Synergy

Part Number Description
SY100EL16S 5V VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER
SY100ELT23 DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com SEMICONDUCTOR SYNERGY DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR ClockWorks™ SY10ELT23 ClockWorks™ SY100ELT23 SY10ELT23 SY100ELT23 FEATURES s s s s s s s 3.0ns typical propagation delay <500ps typical output-to-output skew Differential PECL outputs 24mA TTL outputs Flow-through pinouts ESD protection of 2000V Available in 8-pin SOIC package DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the tranlation of a clock and a data signal.