TC74HC590AP Overview
It achieves the high speed operation similar to epuivalent LSTTL while maintaining the CMOS low power dissipation. The internal counter counts on the positive going edge of Counter Clock (CCK) when Counter Clock Enable ( CCKEN ) is low. When Counter Clear ( CCLR ) is low, the internal counter is cleared asynchronously to the clock.
TC74HC590AP Key Features
- High speed: fmax = 62 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Output drive capability: 15 LSTTL loads for QA to QH
- Symmetrical output impedance: |IOH| = IOL = 6 mA (min)
- Balanced propagation delays: tpLH ≈ tpHL
- Wide operating voltage range: VCC (opr) = 2 to 6 V
- Pin and function patible with 74LS590