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TC74HC597AP - 8-Bit Latch/Shift Register

This page provides the datasheet information for the TC74HC597AP, a member of the TC74HC597AF 8-Bit Latch/Shift Register family.

Features

  • High speed: fmax = 60 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC.
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 6 V.
  • Pin and function compatible with 74LS597 Pin Assignment TC74HC597AP TC74HC597AF W.

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Datasheet Details

Part number TC74HC597AP
Manufacturer Toshiba Semiconductor
File Size 306.83 KB
Description 8-Bit Latch/Shift Register
Datasheet download datasheet TC74HC597AP Datasheet
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Full PDF Text Transcription

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TC74HC597AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC597AP, TC74HC597AF 8-Bit Latch/Shift Register The TC74HC597A is a high speed CMOS 8-BIT PARALLEL-IN/SERIAL-IN SERIAL-OUT LATCH/SHIFT REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists of an 8-bit data register feeding an 8-bit shift register. The parallel data on the A to H inputs is stored in the input register on the positive going transition of RCK. When the SLOAD input is held low, the input register data is passed into the shift registers.
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