TC74HC7292AF Datasheet | Toshiba

TC74HC7292AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC7292AP, TC74HC7292AF Programmable Divider/Timer The TC74HC7292A is a high speed CMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The TC74HC7292A can divide from 22 to 231. CK1 and CK2 are clock inputs, either one may be used for clock gating. It Features an active-low clear input to initialize the state of all flip-flops. To facilitate ining inspection, test points are provided. (TP1, TP2 and TP3) All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features - High speed: fmax = 70 MHz (typ.) at VCC = 5 V - Low power dissipation: ICC = 4 μA (max) at Ta = 25°C - High noise immunity: VNIH = VNIL = 28% VCC (min) - Output drive capability: 10 LSTTL loads - Symmetrical output impedance: |IOH| = IOL = 4 m A (min) - Balanced propagation delays: tp LH ∼- tp HL - Wide operating voltage range: VCC (opr) = 2 to 6 V - Pin and function patible with 74LS292 Pin Assignment TC74HC7292AP Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) © 2001-2017 Toshiba Electronic Devices & Storage Corporation Start of mercial production 1988-11 2017-09-21 IEC Logic Symbol Truth Table CLR CK1 CK2 Q Output Mode Cleared to L Up Count No...