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TC74HC74AP - Dual D-Type Flip-Flop Preset/Clear

Download the TC74HC74AP datasheet PDF. This datasheet also covers the TC74HC74AF variant, as both devices belong to the same dual d-type flip-flop preset/clear family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: fmax = 77 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 6 V.
  • Pin and function compatible with 74LS74 Pin Assignment TC74HC74AP TC74HC74A.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74HC74AF_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC74HC74AP
Manufacturer Toshiba
File Size 227.16 KB
Description Dual D-Type Flip-Flop Preset/Clear
Datasheet download datasheet TC74HC74AP Datasheet

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Other Datasheets by Toshiba

Part Number Description
TC74HC74AF Dual D-Type Flip-Flop Preset/Clear
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Full PDF Text Transcription

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TC74HC74AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC74AP, TC74HC74AF Dual D-Type Flip Flop Preset and Clear The TC74HC74A is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CLOCK pulse. CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an “L” level. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: fmax = 77 MHz (typ.
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