This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | TH58TEG8DCJTA20 |
|---|---|
| Datasheet | TH58TEG8DCJTA20 TC58TEG Datasheet (PDF) |
| File Size | 247.93 KB |
| Manufacturer | Toshiba |
| Description | NAND memory Toggle DDR1.0 |
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Toggle DDR is a NAND interface for high performance applications which support data read and write operations using bidirectional DQS. Toggle DDR NAND has implemented ’Double Data Rate’ without a clock. It is patible with functions and mand which have been supported in conventional type NAND(i.e.
| Part Number | Description |
|---|---|
| TH58TEG8DCJTAK0 | NAND memory Toggle DDR1.0 |
| TH58TEG8DDKTA20 | NAND memory Toggle DDR1.0 |
| TH58TEG8DDKTAK0 | NAND memory Toggle DDR1.0 |
| TH58TEG7DCJTA20 | NAND memory Toggle DDR1.0 |
| TH58TEG7DCJTAK0 | NAND memory Toggle DDR1.0 |
| TH58TEG7DDKTA20 | NAND memory Toggle DDR1.0 |
| TH58TEG7DDKTAK0 | NAND memory Toggle DDR1.0 |
| TH58BVG2S3HBAI4 | 4-GBIT (512M x 8-BIT) CMOS NAND E2PROM |
| TH58BVG3S0HBAI4 | 8 GBIT (1G x 8 BIT) CMOS NAND E2PROM |
| TH58BVG3S0HBAI6 | 8G-BIT (1G x 8 BIT) CMOS NAND E2PROM |
