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GA1086 Datasheet PDF

TriQuint Semiconductor GA1086

the GA1086 can be used to drive up to nineteen 15 pF loads, as shown in Figure 10. The tight control over phase and frequency of the output clocks is achieved with a 400 MHz internal Phase-Locked Loop (PLL). By feeding back one of the output clocks to FBIN, the on-chip PLL continuously maintains synchronization between the input clock (CLK) and all ten outputs.
Part No. GA1086
Datasheet GA1086 Download
Manufacturer
TriQuint Semiconductor
Description 11-Output Clock Buffer
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GA1086 datasheet page 1 preview

FEATURES

● Operates from 30 MHz to 67MHz
● Pin-to-pin output skew of 250 ps (max)
● Period-to-period jitter: 75 ps (typ)
● Near-zero propagation delay: –350 ps ± 500 ps or –350 ps ± 1000 ps
● 10 symmetric, TTL-compatible outputs with 30 mA drive and rise and fall times of 1.4 ns(max) SYSTEM TIMING PRODUCTS Divide Logic MUX Precision Output Buffers 1 GND 28 27 Q7 Q6 VDD 18 26 VDD 19 20 21 22 23 24 25 GND Q2 Q3 VDD Q4 Q5 GND TriQuint’s GA1086 operates from 30 MHz to 67 MHz. This TTL-level clock buffer chip supports the tight timing requirements of high-performance microprocessors, with near zero input-to-output delay and very low pin-topin skew. The device offers 10 usable outputs synchronized in phase and frequency to a periodic clock input signal. One of the ten outputs is a onehalf clock output (CLK ÷ 2). With split termination, Any drift or gradual variation in the system clock is matched and tracked at the ten outputs. The GA1086 output buffers are symmetric, each sourcing and sinking up to 30 mA of drive current.
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