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UR6512 - 2A DDR BUS TERMINATION REGULATOR

General Description

The UR6512 is a linear regulator providing up to 2A for DDR 1/DDR 2 and 1.5A for DDR 3 transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 20mV.

Key Features

  • S.
  • DDR1/ DDR2/DDR3 Termination Voltage.

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UNISONIC TECHNOLOGIES CO., LTD UR6512 LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR  DESCRIPTION The UR6512 is a linear regulator providing up to 2A for DDR 1/DDR 2 and 1.5A for DDR 3 transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 20mV. It contains a high speed operational amplifier which provides fast load transient response and only requires 10uF of ceramic output capacitance. The UR6512 output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force the reference voltage to VREF pin. Additional features include current limiting protection and thermal shutdown protection.