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UR6515D - 3A DDR BUS TERMINATION REGULATOR

Datasheet Summary

Description

The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator applications.

It contains a high speed operational amplifier which provides fast load transient response.

Features

  • S.
  • DDR1/ DDR2/DDR3 termination voltage.

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Datasheet preview – UR6515D

Datasheet Details

Part number UR6515D
Manufacturer UTC
File Size 711.82 KB
Description 3A DDR BUS TERMINATION REGULATOR
Datasheet download datasheet UR6515D Datasheet
Additional preview pages of the UR6515D datasheet.

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Full PDF Text Transcription

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UNISONIC TECHNOLOGIES CO., LTD UR6515D LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR  DESCRIPTION The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator applications. It contains a high speed operational amplifier which provides fast load transient response. The UR6515D output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force the reference voltage to VREF pin. Additional features include current limiting protection and thermal shutdown protection.
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