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UR6515C - 2A DDR BUS TERMINATION REGULATOR

Datasheet Summary

Description

The UR6515C is a linear regulator providing up to 2A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 40mV.

Features

  • S.
  • DDR1/ DDR2/DDR3 termination voltage.

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Datasheet Details

Part number UR6515C
Manufacturer UTC
File Size 339.93 KB
Description 2A DDR BUS TERMINATION REGULATOR
Datasheet download datasheet UR6515C Datasheet
Additional preview pages of the UR6515C datasheet.

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Full PDF Text Transcription

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UNISONIC TECHNOLOGIES CO., LTD UR6515C LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR  DESCRIPTION The UR6515C is a linear regulator providing up to 2A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 40mV. It contains a high speed operational amplifier which provides fast load transient response and only requires 10uF of ceramic output capacitance. The UR6515C output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force the reference voltage to VREF pin. Additional features include current limiting protection and thermal shutdown protection.
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