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W3H32M64E-XSBX - 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package

Key Features

  • Data rate = 667.
  • , 533, 400 Package:.
  • 208 Plastic Ball Grid Array (PBGA), 16 x 20mm.
  • 1.0mm pitch DDR2 Data Rate = 667.
  • , 533, 400 Supply Voltage = 1.8V ± 0.1V Differential data strobe (DQS, DQS#) per byte Internal, pipelined, double data rate architecture 4-bit prefetch architecture DLL for alignment of DQ and DQS transitions with clock signal Four internal banks for concurrent operation (Per DDR2 SDRAM Die) Programmable Burst lengths: 4 or 8 Auto Refresh and Self Refresh.

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Datasheet Details

Part number W3H32M64E-XSBX
Manufacturer White Electronic Designs
File Size 254.37 KB
Description 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
Datasheet download datasheet W3H32M64E-XSBX Datasheet

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White Electronic Designs W3H32M64E-XSBX ADVANCED* www.DataSheet4U.com 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES Data rate = 667*, 533, 400 Package: • 208 Plastic Ball Grid Array (PBGA), 16 x 20mm • 1.0mm pitch DDR2 Data Rate = 667*, 533, 400 Supply Voltage = 1.8V ± 0.