W3H64M72E-XSBX - 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package

Description

Symbol ODT Type Input Description W3H64M72E-XSBX ADVANCED

On-Die termination: ODT (registered HIGH) enables termination resistance internal to the DDR2 SDRAM.

DQ71, LDM, UDM, LDQS, LDQS#, UDQS,

Features

Data rate = 667.
, 533, 400 Package:.
208 Plastic Ball Grid Array (PBGA), 17 x 23mm.
1.0mm pitch DDR2 Data Rate = 667.
, 533, 400 Core Supply Voltage = 1.8V ± 0.1V I/O Supply Voltage = 1.8V ± 0.1V - (SSTL_18 compatible) Differential data strobe (DQS, DQS#) per byte Internal, pipelined, double data rate architecture 4-bit prefetch architecture DLL for alignment of DQ and DQS transitions with clock signal Eight internal banks for concurrent operation (Per DDR2 SDRAM Die) Pr.

White Electronic Designs

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Datasheet Details

Part number	W3H64M72E-XSBX
Manufacturer	White Electronic Designs
File Size	0.96 MB
Description	64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package
Datasheet	W3H64M72E-XSBX Datasheet
Additional preview pages of the W3H64M72E-XSBX datasheet.

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White Electronic Designs W3H64M72E-XSBX ADVANCED* www.DataSheet4U.com 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES Data rate = 667*, 533, 400 Package: • 208 Plastic Ball Grid Array (PBGA), 17 x 23mm • 1.0mm pitch DDR2 Data Rate = 667*, 533, 400 Core Supply Voltage = 1.8V ± 0.1V I/O Supply Voltage = 1.8V ± 0.

Published: Apr 30, 2010 |