WED3C7558M-XBX Datasheet | White Electronic Designs

Features : doze, nap, sleep and dynamic power management. The WED3C7558M-XBX multichip package consists of: 755 RISC processor Dedicated 1MB SSRAM L2 cache, configured as 128Kx72 21mmx25mm, 255 Ceramic Ball Grid Array (CBGA) Core Frequency/L2 Cache Frequency (300MHz/ 150MHz, 350MHz/175MHz) Maximum 60x Bus frequency = 66MHz The WED3C7558M-XBX is offered in mercial (0°C to +70°C), industrial (-40°C to +85°C) and military (-55°C to +125°C) temperature ranges and is well suited for embedded applications such as missiles, aerospace, flight puters, fire control systems and rugged critical systems. - This product is subject to change without notice. Features Footprint patible with WED3C750A8M-200BX Footprint patible with Motorola MPC 745 FIGURE 1 - MULTI-CHIP PACKAGE DIAGRAM August 2002 Rev. 7 White Electronic Designs Corporation - (602) 437-1520 - .wedc. .. White Electronic Designs FIGURE 2 - BLOCK DIAGRAM August 2002 Rev. 7 White Electronic Designs Corporation - (602) 437-1520 - .wedc. .. White Electronic Designs FIGURE 3 - BLOCK DIAGRAM, L2 INTERCONNECT SSRAM 1 L2pin_DATA L2pin_DATA L2pin_DATA L2pin_DATA L20VCC DQa DQb DQc DQd DP0-3 K SGW# SE1# U1 FT# SBd# SBc# SBb# SBa# SW# ADSP# ADV# SE2 L2DP0-3 L2 CLK_OUT A L2WE#...