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XCR3128XL - XCR3128XL 128 Macrocell CPLD

Description

The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions.

A total of eight function blocks provide 3,000 usable gates.

Pin-to-pin propagation delays are 6.0 ns with a maximum system frequency of 145 MHz.

Features

  • Lowest power 128 macrocell CPLD 6.0 ns pin-to-pin logic delays System frequencies up to 145 MHz 128 macrocells with 3,000 usable gates Available in small footprint packages - 144-pin TQFP (108 user I/O pins) - 144-ball CS BGA (108 user I/O) - 100-pin VQFP (84 user I/O) Optimized for 3.3V systems - Ultra low power operation - 5V tolerant I/O pins with 3.3V core supply - Advanced 0.35 micron five layer metal EEPROM process - Fast Zero Power™ (FZP).

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Datasheet Details

Part number XCR3128XL
Manufacturer Xilinx
File Size 91.38 KB
Description XCR3128XL 128 Macrocell CPLD
Datasheet download datasheet XCR3128XL Datasheet
Additional preview pages of the XCR3128XL datasheet.

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0 R XCR3128XL 128 Macrocell CPLD 0 14 DS016 (v1.8) January 8, 2002 Preliminary Product Specification Features • • • • • Lowest power 128 macrocell CPLD 6.0 ns pin-to-pin logic delays System frequencies up to 145 MHz 128 macrocells with 3,000 usable gates Available in small footprint packages - 144-pin TQFP (108 user I/O pins) - 144-ball CS BGA (108 user I/O) - 100-pin VQFP (84 user I/O) Optimized for 3.3V systems - Ultra low power operation - 5V tolerant I/O pins with 3.3V core supply - Advanced 0.
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