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PDSP16488A - Single Chip 2D Convolver

General Description

Pixel data input to the first line delay (most significant byte in 16-bit mode).

Pixel data input to the second group of line delays.

(least significant byte in 16-bit mode).

Key Features

  • s The PDSP16488A is a replacement for the PDSP16488 (see Note below) s 8 or 16-bit Pixels with rates up to 40 MHz s Window Sizes up to 838 with a Single Device s Eight Internal Line Delays s Supports Interlace and Frame-to-Frame Operations s Coefficients Supplied from an EPROM or Remote Host s Expandable in both X and Y for Larger Windows s Gain Control and Pixel Output Manipulation s 84-pin PGA or 132-pin QFP Package Options Note: PDSP16488A devices are not guaranteed to cascade with PDSP16488.

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Datasheet Details

Part number PDSP16488A
Manufacturer Zarlink Semiconductor
File Size 487.97 KB
Description Single Chip 2D Convolver
Datasheet download datasheet PDSP16488A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com PDSP16488A Single Chip 2D Convolver with Integral Line Delays Advance Information DS3713 ISSUE 6.4 December 1997 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of stored coefficients. An internal multiplier accumulator array can be multi-cycled at double or quadruple the pixel clock rate. This then gives the window size options listed in Table 1. An internal 32kbit RAM can be configured to provide either four or eight line delays. The length of each delay can be programmed to the users requirement, up to a maximum of 1024 pixels per line.