A3V64S40GTP Datasheet | Zentel

A3V64S40GTP 64M Single Data Rate Synchronous DRAM 64Mb Synchronous DRAM Specification Zentel Electronics Corp. Revision 1.0 Dec., 2012 A3V64S40GTP 64M Single Data Rate Synchronous DRAM General Description A3V64S40GTP is organized as 4-bank x 1,048,576-word x 16-bit Synchronous DRAM with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. A3V64S40GTP achieve very high speed data rates up to 166MHz, and are suitable for main memories or graphic memories in puter systems. Features - Single 3.3V ±0.3V power supply - Maximum clock frequency: -60:166MHz<3-3-3>/-70:143MHz<3-3-3>/-75:133MHz<3-3-3> - Fully synchronous operation referenced to clock rising edge - 4-bank operation controlled by BA0, BA1 (Bank Address) - CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/FP (programmable) - Burst type- Sequential and interleave burst (programmable) - Byte Control- LDQM and UDQM (A3V64S40GTP) - Random column access - Auto precharge / All bank precharge controlled by A10 - Support concurrent auto-precharge - Auto and self refresh - 4096 refresh cycles /64ms - LVTTL Interface - Package 400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch Pb-free package is available Ordering Information 54Pin TSOPII (400mil x 875mil) Part No. Max....