EV12DS130AGS Overview
Key Features
- 12-bit Resolution
- 3 GSps Guaranteed Conversion Rate
- 6 GHz Analog Output Bandwidth
- 60 ps Full Scale Rise Time
- Selectable Output Modes : Return to Zero, Non Return to Zero, Narrow Return to Zero, RF
- Low Latency Time: 3.5 Clock Cycle
- 1.3 Watt Power Dissipation
- Functions – Selectable MUX Ratio 4:1 (Full Speed), 2:1 (Half Speed) – Triple Majority Voting – User-friendly Functions
- Gain Adjustment
- Input Data Check Bit (IDC_P, IDC_N) for Timing with FPGA Check
