Datasheet Summary
74ACT11004 HEX INVERTER
D Inputs Are TTL-Voltage patible D Flow-Through Architecture Optimizes PCB
Layout
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPIC (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages and Standard Plastic (N) 300-mil
DIPs
SCAS215B
- JANUARY 1988
- REVISED JUNE 1997
DB, DW, N, OR PW PACKAGE (TOP VIEW)
1Y 1 2Y 2 3Y 3 GND 4 GND 5 GND 6 GND 7 4Y 8 5Y 9 6Y 10
20 1A 19 2A 18 3A 17 NC 16 VCC 15 VCC 14 NC
13 4A
12 5A
11 6A
- No internal connection description...