Datasheet Summary
74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE
D Inputs Are TTL-Voltage patible D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPIC™ (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at 125°C
D Package Options Include Plastic
Small-Outline (D), Plastic Thin Shrink
Small-Outline (PW), and Standard Plastic
300-mil DIPs (N) Packages
SCAS013C
- AUGUST 1987
- REVISED APRIL 1996
D, N, OR PW PACKAGE (TOP VIEW)
1A 1 1Y 2 2Y 3 GND 4 GND 5 3Y 6 4Y 7 4B 8
16 1B 15 2A 14 2B 13 VCC 12 VCC 11 3A 10 3B 9 4A description
The 74ACT11008 contains four independent 2-input AND gates. It performs the Boolean function Y = ASB or
+ ) Y A B...