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ADS61JB23 Datasheet Analog-to-Digital Converters

Manufacturer: Texas Instruments

Overview: ADS61JB23 www.ti.com SLOS755 – DECEMBER 2012 12-Bit Input-Buffered 80 MSPS ADC with JESD204A Output Interface Check for Samples:.

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General Description

The ADS61JB23 is a high-performance, low-power, single channel analog-to-digital converter with an integrated JESD204A output interface.

Available in a 6 mm x 6 mm QFN package, with both single-lane and dual-lane output modes, the ADS61JB23 offers an unprecedented level of compactness.

The output interface is compatible to the JESD204A standard, with an additional mode (as per IEEE Std 802.3-2002 part3, Clause 36.2.4.12) to interface seamlessly to the TI TLK family of SERDES transceivers.

Key Features

  • 1.
  • Output Interface:.
  • Single-Lane and Dual-Lane Interfaces.
  • Maximum Data Rate of 1.6 Gbps.
  • Meets JESD204A Specification.
  • CML Outputs with Current Programmable from 2 mA.
  • 32 mA.
  • Power Dissipation:.
  • 440 mW at 80 MSPS in Single Lane Mode.
  • Power Scales Down with Clock Rate.
  • Input Interface: Buffered Analog Inputs.
  • 71.7 dBFS SNR at 70 MHz IF.
  • Analog Input FSR: 2 Vpp.
  • External and Inter.

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