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ADS6444-EP - Analog-to-Digital Converters

Download the ADS6444-EP datasheet PDF. This datasheet also covers the ADS6445-EP variant, as both devices belong to the same analog-to-digital converters family and are provided as variant models within a single manufacturer datasheet.

General Description

The ADS6445/ADS6444 is a high performance 14 bit 125/105 MSPS quad channel A-D converter.

Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density.

Key Features

  • 1.
  • Maximum Sample Rate: 125 MSPS.
  • 14-Bit Resolution with No Missing Codes.
  • Simultaneous Sample and Hold.
  • 3.5-dB Coarse Gain and up to 6-dB Programmable Fine Gain for SFDR/SNR TradeOff.
  • Serialized LVDS Outputs with Programmable Internal Termination Option.
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVPP.
  • Internal Reference with External Reference Support.
  • No External Decoupling Required for Ref.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADS6445-EP-etcTI.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Texas Instruments

Part Number Description
ADS6444 Analog-to-Digital Converters
ADS6442 Analog-to-Digital Converters
ADS6443 Analog-to-Digital Converters
ADS6445 Analog-to-Digital Converters
ADS6445-EP Analog-to-Digital Converters

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ADS6445-EP ADS6444-EP www.ti.com SLAS573C – FEBRUARY 2008 – REVISED MAY 2013 QUAD CHANNEL, 14 BIT, 125/105 MSPS ADC WITH SERIAL LVDS OUTPUTS Check for Samples: ADS6445-EP, ADS6444-EP FEATURES 1 • Maximum Sample Rate: 125 MSPS • 14-Bit Resolution with No Missing Codes • Simultaneous Sample and Hold • 3.5-dB Coarse Gain and up to 6-dB Programmable Fine Gain for SFDR/SNR TradeOff • Serialized LVDS Outputs with Programmable Internal Termination Option • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVPP • Internal Reference with External Reference Support • No External Decoupling Required for References • 3.