AM2631
Features
Processor Cores:
- Single, dual, and quad-core Arm® Cortex®-R5F MCU with each core running up to 400MHz
- 16KB I-cache with 64-bit ECC per CPU core
- 16KB D-cache with 32-bit ECC per CPU core
- 64KB Tightly-Coupled Memory (TCM) with 32bit ECC per CPU core
- Lockstep or Dual-core capable clusters
Memory Subsystem:
- 2MB of On-Chip RAM (OCSRAM)
- 4 Banks x 512KB
- ECC error protection
- Internal DMA engine support
System on Chip (So C) Services and Architecture:
- 1x EDMA to support data movement functions
- Device Boot supported from the following interfaces:
- UART (Primary/Backup)
- QSPI NOR Flash (4S/1S) (Primary)
- Interprocessor munication modules
- SPINLOCK module for synchronizing processes running on multiple cores
- MAILBOX functionality implemented through
CTRLMMR registers
- Central Platform Time Sync (CPTS) support with time-sync and pare-event interrupt routers
Media and Data Storage:
- 1x 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface
- General-Purpose...
