CD74HCT652 Datasheet | Texas Instruments

Data sheet acquired from Harris Semiconductor SCHS194A February 1998 - Revised May 2003 CD74HC652, CD74HCT652 High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State Features Description - CD74HC652, CD74HCT652 - - . Non-Inverting [- /ITnditelepe(n Cd Den7t4RHeg Cis6t5e2rs, f Cor DA74an Hd CBTB6u5s2e)s /- STuhbrjeeec-t S(ta Hteig Ohu-t Sppuetsed CMOS Logic Octal-Bus T- r Darnivsecsei1v5e Lr/SRTe Tg Lis Ltoeardss, Three-State) /Author () /- KTeyypwicaolr Pdrsop()agation Delay = 12ns at VCC = 5V, CL = 15p F /- CFraenaotourt ((O) ver Temperature Range) /D-OSCta In Nd Fa Ord Opduftpmuatsrk- - - 10 LSTTL Loads - Bus Driver Outputs - - . . . 15 LSTTL Loads [- /WPaidgee OMpoerdaetin/g UTseem Opuetrlaitnuerse Range . . . -55o C to 125o C /- DBOal Can Vc Ie Ed WProppdafgmataiorkn Delay and Transition Times - Significant Power Reduction pared to LSTTL Logic ICs - Alternate Source is Philips - HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V - HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input patibility, Il ≤ 1µA at VOL, VOH The CD74HC652 and CD74HCT652 three-state, octal-bus transceiver/registers use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits. The CD74HC652 and CD74HCT652 have non-inverting outputs. These devices consists of bus transceiver circuits, D-type flipflops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output Enables OEAB and OEBA are provided to control the transceiver functions. SAB and SBA control pins are provided to select whether real-time or stored data is transferred. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and...