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CDCF2509 - 3.3-V Phase-Lock Loop Clock Driver

Datasheet Summary

Description

The CDCF2509 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.

It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.

It is specifically designed for use with synchronous DRAMs.

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Datasheet preview – CDCF2509

Datasheet Details

Part number CDCF2509
Manufacturer Texas Instruments
File Size 501.99 KB
Description 3.3-V Phase-Lock Loop Clock Driver
Datasheet download datasheet CDCF2509 Datasheet
Additional preview pages of the CDCF2509 datasheet.

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Full PDF Text Transcription

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CDCF2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS624C − APRIL 1999 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for this Device D Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.
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