Full PDF Text Transcription for DAC5687 (Reference)
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DAC5687. For precise diagrams, and layout, please refer to the original PDF.
DAC5687 www.ti.com SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006 16-BIT, 500 MSPS 2×–8× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) FEATURES 1 •2345 ...
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ATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) FEATURES 1 •2345 500 MSPS • Selectable 2×–8× Interpolation • On-Chip PLL/VCO Clock Multiplier • Full IQ Compensation Including Offset, Gain, and Phase • Flexible Input Options: – FIFO With Latch on External or Internal Clock – Even/Odd Multiplexed Input – Single Port Demultiplexed Input • Complex Mixer With 32-Bit NCO • Fixed Frequency Mixer With fS/4 and fS/2 • 1.8-V or 3.3-V I/O Voltage • On-Chip 1.2-V Reference • Differential Scalable Output: 2 mA to 20 mA • Pin Compatible to DAC5686 • High Performance – 81-dBc ACLR WCDMA TM1 at 30.72 MHz – 72-dBc ACLR WCDMA TM1 at 15
DAC5687 Datasheet
