Datasheet4U Logo Datasheet4U.com

DS90C385A - +3.3V Programmable LVDS Transmitter

General Description

The DS90C385A is a pin to pin compatible replacement for DS90C383, DS90C383A and DS90C385.

Key Features

  • 1.
  • 23 Pin-to-Pin Compatible to DS90C383, DS90C383A and DS90C385.
  • No Special Start-Up Sequence Required between Clock/Data and /PD Pins. Input Signals (Clock and Data) can be Applied Either Before or After the Device is Powered.
  • Support Spread Spectrum Clocking up to 100kHz Frequency Modulation and Deviations of ±2.5% Center Spread or -5% Down Spread.
  • “Input Clock Detection" Feature Will Pull All LVDS Pairs to Logic Low When Input Clock is Missing and When /PD.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
DS90C385 +3.3V Programmable LVDS Transmitter National Semiconductor
DS90C383 +3.3V Programmable LVDS Transmitter National Semiconductor
DS90C383A +3.3V Programmable LVDS Transmitter National Semiconductor
DS90C387 Dual Pixel LVDS Display Interface National Semiconductor
DS90C387A Dual Pixel LVDS Display Interface/FPD-Link National Semiconductor

Other Datasheets by Texas Instruments

Part Number Description
DS90C383B Programmable LVDS Transmitter
DS90C387 Dual Pixel LVDS Display Interface
DS90C387R 85MHz Dual 12-Bit Double Pumped Input LDI Transmitter
DS90C3201 3.3V 8 MHz to 135 MHz Dual FPD-Link Transmitter
DS90C3202 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS90C385A www.ti.com SNLS167K – MARCH 2004 – REVISED APRIL 2013 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display Link-87.5 MHz Check for Samples: DS90C385A FEATURES 1 •23 Pin-to-Pin Compatible to DS90C383, DS90C383A and DS90C385 • No Special Start-Up Sequence Required between Clock/Data and /PD Pins. Input Signals (Clock and Data) can be Applied Either Before or After the Device is Powered. • Support Spread Spectrum Clocking up to 100kHz Frequency Modulation and Deviations of ±2.5% Center Spread or -5% Down Spread • “Input Clock Detection" Feature Will Pull All LVDS Pairs to Logic Low When Input Clock is Missing and When /PD Pin is Logic High • 18 to 87.5 MHz Shift Clock Support • Tx Power Consumption < 147 mW (typ) at 87.