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DS90CF384A - +3.3V LVDS Receiver

Download the DS90CF384A datasheet PDF. This datasheet also covers the DS90CF364A variant, as both devices belong to the same +3.3v lvds receiver family and are provided as variant models within a single manufacturer datasheet.

General Description

The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL).

Key Features

  • 1.
  • 2 20 to 65 MHz Shift Clock Support.
  • 50% Duty Cycle on Receiver Output Clock.
  • Best-in-Class Set & Hold Times on RxOUTPUTs.
  • Rx Power Consumption 700V (EIAJ).
  • Supports VGA, SVGA, XGA and Dual Pixel SXGA.
  • PLL Requires no External Components.
  • Compatible with TIA/EIA-644 LVDS Standard.
  • Low Profile 56-lead or 48-lead Packa.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DS90CF364A-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
DS90CF384A +3.3V LVDS Receiver National Semiconductor
DS90CF384 +3.3V Programmable LVDS Transmitter National Semiconductor
DS90CF383 +3.3V LVDS Transmitter National Semiconductor
DS90CF386 +3.3V LVDS Receiver National Semiconductor
DS90CF388 Dual Pixel LVDS Display Interface National Semiconductor

Other Datasheets by Texas Instruments

Part Number Description
DS90CF384AQ +3.3V LVDS Receiver
DS90CF383B +3.3V Programmable LVDS Transmitter
DS90CF386 3.3-V LVDS Receiver
DS90CF388 Dual Pixel LVDS Display Interface
DS90CF363B +3.3V Programmable LVDS Transmitter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS90CF364A, DS90CF384A www.ti.com SNLS040I – JUNE 2000 – REVISED APRIL 2013 DS90CF384A/DS90CF364A +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz Check for Samples: DS90CF364A, DS90CF384A FEATURES 1 •2 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption <142 mW (typ) @65MHz Grayscale • Rx Power-down Mode <200μW (max) • ESD Rating >7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XGA and Dual Pixel SXGA. • PLL Requires no External Components • Compatible with TIA/EIA-644 LVDS Standard • Low Profile 56-lead or 48-lead Packages DESCRIPTION The DS90CF384A receiver converts the four LVDS data streams (Up to 1.