LMK00306 Datasheet | Texas Instruments

Product Folder Sample & Buy Technical Documents Tools & Software Support & munity SNAS578D - FEBRUARY 2012 - REVISED MARCH 2016 LMK00306 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator 1 Features - 1 3:1 Input Multiplexer - Two Universal Inputs Operate up to 3.1 GHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks - One Crystal Input Accepts a 10 to 40 MHz Crystal or Single-Ended Clock - Two Banks with 3 Differential Outputs Each - LVPECL, LVDS, HCSL, or Hi-Z (Selectable Per Bank) - LVPECL Additive Jitter with LMK03806 Clock Source at 156.25 MHz: - 20 fs RMS (10 kHz to 1 MHz) - 51 fs RMS (12 kHz to 20 MHz) - High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz - LVCMOS Output with Synchronous Enable Input - Pin-Controlled Configuration - VCC Core Supply: 3.3 V ± 5% - 3 Independent VCCO Output Supplies: 3.3 V/2.5 V ± 5% - Industrial Temperature Range: -40°C to +85°C - 36-lead WQFN (6 mm × 6 mm) 2 Applications - Clock Distribution and Level Translation for ADCs, DACs, Multi-Gigabit Ethernet, XAUI, Fibre Channel, SATA/SAS, SONET/SDH, CPRI, HighFrequency Backplanes - Switches, Routers, Line Cards, Timing Cards - Servers, puting, PCI Express (PCIe 3.0)...