LMK03328 Datasheet PDF - Texas Instruments Ultra-Low Jitter Clock Generator Specs

LMK03328 - Ultra-Low Jitter Clock Generator

Datasheet Summary

Description

The LMK03328 device is an ultra-low-noise clock generator with two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fanout, and pin-selectable configuration states stored in on-chip EEPROM.

Features

1 Ultra Low Noise, High Performance.
Jitter: 100-fs RMS Typical, FOUT > 100 MHz.
PSNR:.
80 dBc, Robust Supply Noise Immunity.
Flexible Device Options.
Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS Outputs, or Any Combination.
Pin Mode, I2C Mode, and EEPROM Mode.
71-Pin Selectable Pre-Programmed Default Start-Up Options.
Dual Inputs With Automatic or Manual Selection.
Crystal Input: 10 to 52 MHz.

Datasheet Details

Part number	LMK03328
Manufacturer	Texas Instruments
File Size	1.62 MB
Description	Ultra-Low Jitter Clock Generator
Datasheet	LMK03328 Datasheet
Additional preview pages of the LMK03328 datasheet.

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Full PDF Text Transcription

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Product Folder Order Now Technical Documents Tools & Software Support & Community LMK03328 SNAS668D – AUGUST 2015 – REVISED APRIL 2018 LMK03328 Ultra-Low Jitter Clock Generator With Two Independent PLLs, Eight Outputs, Integrated EEPROM 1 Features •1 Ultra Low Noise, High Performance – Jitter: 100-fs RMS Typical, FOUT > 100 MHz – PSNR: –80 dBc, Robust Supply Noise Immunity • Flexible Device Options – Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS Outputs, or Any Combination – Pin Mode, I2C Mode, and EEPROM Mode – 71-Pin Selectable Pre-Programmed Default Start-Up Options • Dual Inputs With Automatic or Manual Selection – Crystal Input: 10 to 52 MHz – External Input: 1 to 300 MHz • Frequency Margining Options – Fine Frequency Margining (±50 ppm Typical) Using Low-Cost Pullable Crys

Published: Oct 24, 2019 |