Datasheet Details
| Part number | SN54LVTH182504A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 858.30 KB |
| Description | 3.3-V ABT SCAN TEST DEVICES |
| Datasheet | SN54LVTH182504A SN54LVTH18504A Datasheet (PDF) |
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Overview: SN54LVTH18504A, SN54LVTH182504A, SN74LVTH18504A, SN74LVTH182504A 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS667B – JULY 1996 – REVISED JUNE 1997 D Members of the Texas Instruments SCOPE ™ Family of Testability Products D Members of the Texas Instruments Widebus ™ Family D State-of-the-Art 3.3-V ABT Design Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) D Support Unregulated Battery Operation Down to 2.7 V D UBT ™ (Universal Bus Transceiver) bines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D B-Port Outputs of ’LVTH182504A Devices Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required D patible With the IEEE Std 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture D SCOPE Instruction Set – IEEE Std 1149.1-1990 Required Instructions and Optional CLAMP and HIGHZ – Parallel-Signature Analysis at Inputs – Pseudo-Random Pattern Generation From Outputs – Sample Inputs/Toggle Outputs – Binary Count From Outputs – Device Identification – Even-Parity Opcodes D Packaged in 64-Pin Plastic Thin Quad Flat (PM) Packages Using 0.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | SN54LVTH182504A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 858.30 KB |
| Description | 3.3-V ABT SCAN TEST DEVICES |
| Datasheet | SN54LVTH182504A SN54LVTH18504A Datasheet (PDF) |
|
|
|
The ’LVTH18504A and ’LVTH182504A scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments (TI) SCOPE testability integrated-circuit family.
This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of plex circuit-board assemblies.
Scan access to the test circuitry is acplished via the 4-wire test access port (TAP) interface.
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