SN74AHC174 Datasheet | Texas Instruments

D Operating Range 2-V to 5.5-V VCC D Contain Six Flip-Flops With Single-Rail Outputs D Applications Include: - Buffer/Storage Registers - Shift Registers - Pattern Generators D Latch-Up Performance Exceeds 250 m A Per JESD 17 D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) description The ’AHC174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input and are designed for 2-V to 5.5-V VCC operation. Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output. SN54AHC174, SN74AHC174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS425F - JUNE 1998 - REVISED FEBRUARY 2002 SN54AHC174 . . . J OR W PACKAGE SN74AHC174 . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) CLR 1Q 1D 2D 2Q 3D 3Q 1 2 3 4 5 6 7 8 16 VCC 15 6Q 14 6D 13 5D 12 5Q 11 4D 10 4Q 9 CLK SN54AHC174 . . . FK PACKAGE (TOP VIEW) 1Q CLR NC VCC 6Q 3 2 1 20 19 1D 4 18 6D 2D 5 17...