SN74AHCT367 Description
The SN74AHCT367 device is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. SN74AHCT367 SCLS418H JUNE 1998 REVISED DECEMBER 2014 .ti.
SN74AHCT367 Key Features
- 1 Inputs are TTL-Voltage patible
- True Outputs
- Latch-Up Performance Exceeds 100 mA
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model
- 200-V Machine Model
- 2000-V Charged-Device Model