Datasheet Details
| Part number | SN74F174A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 432.17 KB |
| Description | HEX D-TYPE FLIP-FLOP |
| Datasheet | SN74F174A-etcTI.pdf |
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Overview: • Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for.
| Part number | SN74F174A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 432.17 KB |
| Description | HEX D-TYPE FLIP-FLOP |
| Datasheet | SN74F174A-etcTI.pdf |
|
|
|
This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse.
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse.
| Part Number | Description |
|---|---|
| SN74F175 | QUADRUPLE D-TYPE FLIP-FLOP |
| SN74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| SN74F1016 | 16-Bit Schottky Barrier Diode RC Bus-Termination Array |
| SN74F1056 | 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY |
| SN74F109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
| SN74F11 | Triple 3-Input AND Gate |
| SN74F112 | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
| SN74F125 | QUADRUPLE BUS BUFFER GATE |
| SN74F126 | QUADRUPLE BUS BUFFER GATE |
| SN74F138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |