SN74LV166A Datasheet | Texas Instruments

D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Ioff Supports Partial-Power-Down-Mode Operation D Synchronous Load SN54LV166A . . . J OR W PACKAGE SN74LV166A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) SER 1 A2 B3 C4 D5 CLK INH 6 CLK 7 GND 8 16 VCC 15 SH/LD 14 H 13 QH 12 G 11 F 10 E 9 CLR SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C - FEBRUARY 2001 - REVISED APRIL 2005 D Direct Overriding Clear D Parallel-to-Serial Conversion D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds...