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SN74LV166A Datasheet 8-bit Parallel-load Shift Register

Manufacturer: Texas Instruments

Overview: D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Ioff Supports Partial-Power-Down-Mode Operation D Synchronous Load SN54LV166A . . . J OR W PACKAGE SN74LV166A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) SER 1 A2 B3 C4 D5 CLK INH 6 CLK 7 GND 8 16 VCC 15 SH/LD 14 H 13 QH 12 G 11 F 10 E 9 CLR SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D Direct Overriding Clear D Parallel-to-Serial Conversion D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) SN54LV166A . . .

General Description

/ordering information NC − No internal connection The ’LV166A devices are 8-bit parallel-load shift registers, designed for 2-V to 5.5-V VCC operation.

ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D Tube of 40 Reel of 2500 SN74LV166AD SN74LV166ADR LV166A SOP − NS Reel of 2000 SN74LV166ANSR 74LV166A −40°C to 85°C SSOP − DB Reel of 2000 Tube of 90 SN74LV166ADBR SN74LV166APW LV166A TSSOP − PW Reel of 2000 Reel of 250 SN74LV166APWR SN74LV166APWT LV166A TVSOP − DGV Reel of 2000 SN74LV166ADGVR LV166A CDIP − J Tube of 25 SNJ54LV166AJ SNJ54LV166AJ −55°C to 125°C CFP − W Tube of 150 SNJ54LV166AW SNJ54LV166AW LCCC − FK Tube of 55 SNJ54LV166AFK SNJ54LV166AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

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