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SN74LV595A - 8-Bit Shift Registers

Description

VCC operation of 2 V to 5.5 V Maximum tpd of 7.1 ns at 5 V Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (output VOH undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C Support mixed-mode voltage operation on all ports

Features

  • 3.

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Full PDF Text Transcription

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SN74LV595A SCLS414T – APRIL 1998 – REVISED MARCH 2023 SN74LV595A 8-Bit Shift Registers With 3-State Output Registers 1 Features 3 Description • VCC operation of 2 V to 5.5 V • Maximum tpd of 7.1 ns at 5 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (output VOH undershoot) > 2.3 V at VCC = 3.
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