SN75512B Datasheet | Texas Instruments

description The SN65512B and SN75512B are monolithic BIDFET† integrated circuits designed to drive a dot matrix or segmented vacuum fluorescent display. All device inputs are diode-clamped pnp inputs and assume a high logic level when open circuited. The nominal input threshold voltage is 1.5 V. Outputs are totem-pole structures formed by an npn emitter-follower and double-diffused MOS (DMOS) transistors. The device consists of a 12-bit shift register, 12 latches, and 12 output AND gates. Serial data is entered into the shift register on the low-to-high transition of CLOCK. When high, LATCH ENABLE transfers the shift register contents to the outputs of the 12 latches. The active-low STROBE input enables all Q outputs. Serial data output from the shift register can be used to cascade shift registers. This output is not affected by LATCH ENABLE or STROBE. The SN65512B is characterized for operation from - 40°C to 85°C. The SN75512B is characterized for operation from 0°C to 70°C. SN65512B, SN75512B VACUUM FLUORESCENT DISPLAY DRIVERS ą SLDS016A - DECEMBER 1985 - REVISED OCTOBER 1989 DW OR N PACKAGE (TOP VIEW) Q11 Q12 STROBE SERIAL OUT DATA IN VCC1 CLOCK LATCH ENABLE Q1 Q2 1 2 3 4 5 6 7 8 9 10 20 Q10 19 Q9 18 Q8 17 Q7 16 VCC2 15 GND 14 Q6 13 Q5 12 Q4 11 Q3 logic symbol‡ 8 LATCH ENABLE 3 STROBE 7 CLOCK TTL / VAC FLUOR DISPLAY SRG12 C1/ 5 DATA IN 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 2D 3 9 Q1 10 Q2 11 Q3 12 Q4 13 Q5 14 Q6 17 Q7 18 Q8 19 Q9 20 Q10 1 Q11 2 Q12 4 SERIAL OUT ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. † BIDFET - Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all...