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TDA4VH-Q1 - Jacinto Processors

Key Features

  • Processor cores:.
  • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS.
  • Up to Four Deep-learning matrix multiply accelerator (MMAv2), up to 32 TOPS (8b) at 1.0 GHz.
  • Two Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators.
  • Depth and Motion Processing Accelerators (DMPAC).
  • Eight Arm® Cortex®-A72 microprocessor subsystem at up to 2.0 GHz.
  • 2MB shared L2 cache p.

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Other Datasheets by Texas Instruments

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 SPRSP79B – FEBRUARY 2023 – REVISED DECEMBER 2023 TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto™ Processors 1 Features Processor cores: • Up to Four C7x floating point, vector DSP, up to 1.0 GHz, 320 GFLOPS, 1024 GOPS • Up to Four Deep-learning matrix multiply accelerator (MMAv2), up to 32 TOPS (8b) at 1.0 GHz • Two Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators • Depth and Motion Processing Accelerators (DMPAC) • Eight Arm® Cortex®-A72 microprocessor subsystem at up to 2.0 GHz – 2MB shared L2 cache per quad-core Cortex®A72 cluster – 32KB L1 DCache and 48KB L1 ICache per Cortex®-A72 core • Eight Arm® Cortex®-R5F MCUs at up to 1.